This is how FPGA Prototyping Works |
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Majeed Ahmad Published on 07-02-2015 11:00 AM
FPGA prototyping has come a long way since the late 1980s when chipmakers began using FPGA devices for building system prototypes of ASIC designs. The utility of a working FPGA prototype allows hardware designers to develop and test their systems, and it provides software developers early access to a fully functioning hardware platform.
A lot has changed since the late 1980s when FPGAs emerged on the semiconductor realm. Chip developers are now dealing with mega-million gate counts for the larger ASIC/SoC designs, and here, design partitioning, debug and scalability requirements are turning the FPGA-based prototyping technology into an even more viable design tool.
S2C Inc.'s e-book titled "Getting the Most Out of FPGA Prototyping" can serve as a handbook on how this design methodology works. Moreover, it debunks the myths surrounding the issues regarding how FPGA prototyping works and what value it brings to ASIC/SoC designers. S2C has cobbled the e-book on FPGA prototyping systems using a series of articles published in EE Times.
The series of articles can help chip designers navigate the world of FPGA prototyping technology—everything from overcoming FPGA prototyping hurdles to expanding the use of FPGA prototype design flow to even the larger designs.
Furthermore, the e-book from S2C looks into the specifics of how FPGA-based prototyping can accelerate design and verification process. And by doing that it offers an insight into how a complete prototyping platform can be helpful at any design stage and for any design size.
FPGA Prototyping: Challenges and Solutions
The book kicks off with an outline of five key challenges to FPGA prototyping and provides a detailed treatment of issues such as partitioning, debug and reusability. Next, it delves into ways for addressing these challenges and details the criteria for selecting FPGA-based prototyping systems.
The e-book also clears the air about this myth that FPGA prototyping is only suited to small designs; it forcefully makes the case for the use of FPGA prototyping in large SoC designs. Here, the book refers to the recent advancements in partitioning, debug, and scalability that have made FPGA-based prototyping a far more suitable solution for the large ASIC/SoC designs.
The book also shows how extending the functionality of FPGA prototyping through the use of a transactor interface can open up tremendous possibilities to designers. Next up, Getting the Most Out of FPGA Prototyping resorts to transactor as a use case of an interface between a software program and AXI-compliant hardware.
Finally, about the SoC designs, which are growing both in size and complexity, it's worth noting that software development and hardware verification are the two leading factors in SoC design cost. Here, at this SoC premise, the book shows how today's off-the-shelf FPGA prototyping systems can offer value in every stage of the SoC design flow. And it claims that FPGA-based prototyping technology is ready to cater to the next-generation SoC designs through extensible and scalable systems that offer a variety of both hardware and software interfaces.
The ebook Getting the Most Out of FPGA Prototyping is short, sweet and well worth an ASIC/SoC designers' time.
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