S2C rolls new IP, algorithm, and ASIC rapid-prototyping platform based on Xilinx Virtex-7 2000T 3D FPGA

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S2C rolls new IP, algorithm, and ASIC rapid-prototyping platform based on Xilinx Virtex-7 2000T 3D FPGA | Xilinx

Dec 11, 2014

FPGAs are great prototyping targets for developing new IP blocks, algorithms, and entire ASICs. S2C has justannounced its latest prototyping platform, the SingleE V7 Logic Module based on a Xilinx Virtex-7 2000T 3D FPGA. It measures a diminutive 260mm x 170mm and features:

960 I/Os on 8 high-speed connectors
Access to a library of over 70 daughter cards for quickly building a prototype target
On-board DDR3 SO-DIMM socket extending to 8Gbytes of memory running at 1600Mbytes/sec
Remote control management through Ethernet and USB for programmable clock generations, design resets, virtual I/Os and switches, I/O voltage setting, and monitoring of voltage/current/temperature and hardware status
Multiple SingleE V7 Logic Module management from one PC

S2C SingleE V7 Logic Module Block Diagram.jpg

The S2C SingleE V7 Logic Module can take on many hardware development tasks including:

Running ESL simulations to evaluate model accuracy
Validate SoC software on a target architecture
Algorithm development using real hardware
Create corner test cases in software and run exercises on a hardware prototype
Run regression tests on FPGA prototype hardware using vectors stored in the host computer

前： Point/Counterpoint: Today’s FPGA Prototyping—Breaking the Typecast Mold | Electronic Design