Smaller And Bigger At The Same Time for Altera and S2C | EDA
Apr 21, 2011

Smaller And Bigger At The Same Time for Altera and S2C

    

Foundries have reached the point that allows the use of the 28 nm process for commercial production.  FPGA companies are at the forefront in using the technology to provide devices that use the smallest dimensions for each transistor and also offer the largest number of transistors ever.

Just a few days ago Altera announced that it set an industry milestone in semiconductor technology by delivering the most transistors ever packed onto an integrated circuit. The company wrote that the 28-nm Stratix V FPGAs are the semiconductor industry's first devices to feature 3.9 billion transistors. This level of functionality delivers unparalleled performance to system designers.

They are the only FPGAs to leverage TSMC's 28-nm high-performance (28HP) process for maximum performance and bandwidth. The 28HP process, combined with optimizations made in the FPGA design, enable Altera to increase the capabilities of its high-end device family. Features such as 28-Gbps transceivers, variable precision DSP blocks and embedded HardCopy® blocks enable Stratix V FPGAs to be leveraged in the highest performance, highest-bandwidth applications.

During its presentation at the Globalpress Electronics Summit, Bradley Howe, VP of IC Engineering at Altera, talked about the company focus in implementing optical transceivers in their devices that will enable throughputs equal to 28 Gbps.  You can read about the Electronics Summit here. Samples of the first member of Altera's Stratix V FPGA family (Stratix V 5SGXA7) are shipping now.

Today S2C Released a prototyping system that supports the development of a  32.8 Million Gate SoC/ASIC device.  The Quad S4 TAI Logic Module, based on four Altera Stratix IV 820 FPGAs. The Quad S4 TAI Logic Module can hold design up to 32.8 million gates and features S2C’s fourth generation prototyping technology including enhanced power management, cooling mechanisms, noise shielding and convenient SD card download.

The Quad S4 TAI Logic Module contains a number of S2C’s 4th generation features including:

    • High Capacity – up to 32.8 million gates per board with four Altera Stratix IV 820 FPGA devices
    • On board DDR2/DDR3 memory – Each board has two on-board DDR2 and two DDR3 SODIMM sockets to meet a variety of high speed memory applications.
    • 1,920 Flexible I/O – Each FPGA has 480 I/O on four connectors and I/O voltage on each connector can be individually adjusted to 1.5/1.8/2.5/3.0V
    • Flexible Interconnect – 300 inter-connections among four FPGAs for SoC bus architecture.
    • Additional Interconnects available through use of Interconnection Modules.
    • Design Partitioning – TAI Player Pro supports partitioning designs across four FPGAs
    • Advanced Clock Management – Nineteen global user clocks that can be choose from six software programmable clocks, three OSC sockets, three SMB connectors and ten feedback clocks.
    • Easy FPGA download – USB, SD Card, or JTAG
    • Comprehensive Self-Test program

The Quad S4 TAI Logic Module is available immediately.

試作検証プランを入手

どのタイプのチップを設計していますか?
設計に含まれるASICゲートの容量は?
500万~2000万
2,000万~5,000万
5000万~1億
1億~10億
10億以上
どのFPGAを使いたいですか?
ザイリンクス VU440
ザイリンクス KU115
ザイリンクス VU19P
ザイリンクス VU13P
ザイリンクス VU9P
インテル S10-10M
インテル S10-2800
わからない、専門家のアドバイスが必要
どのようなFPGA構成が必要ですか?
シングルFPGA
デュアルFPGA
4 つの FPGA
8つのFPGA
わからない、専門家のアドバイスが必要
どのような周辺機器インターフェースが必要ですか?
プロトタイプ検証プラットフォームはいくつ必要ですか?
以下のツールが必要ですか?
セグメンテーションツール
複数の FPGA デバッグ ツール
コモデリング ツール (FPGA と PC ホスト間で大量のデータをやり取りできます)
当社の製品をいつ使用する必要がありますか?
0~6ヶ月
6-12ヶ月
12ヶ月以上
わからない
その他
参加する
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