MIPI CSI-2 and DSI IP? Better with FPGA Prototyping Set | SemiWiki.com
May 04, 2015

MIPI CSI-2 and DSI IP? Better with FPGA Prototyping Set

Eric Esteve  Published on 05-04-2015 07:00 AM

Sourcing MIPI CSI-2 or DSI IP to a respected IP vendor is mandatory to build a peripheral IC or a SoC targeting mobile application as the chip maker simply can’t afford to do a re-spin because of Time-To-Market imperative. Buying this IP to a vendor also offering MIPI powered FPGA Prototyping Platforms is even better! Northwest Logic was one the first IP vendors to develop controller for MIPI camera (CSI-2) and display (DSI) specifications and they know that their customer very first need is for silicon proven solution and right after to benefit for a FPGA Prototyping Platforms integrating MIPI D-PHY and CSI-2 (or DSI) controller. That’s why S2C and Northwest Logic have built such a partnership. The cores are now a part of S2C’s expansive library of Prodigy Prototype Ready™ Interfaces, see picture:

A fully defined MIPI D-PHY interface requires one clock lane and four data lanes using in the above board Meticom MC20901 as a Rx D-PHY chip and Meticom MC20902 as a Tx D-PHY chip. Let’s take a short look at these Meticom FPGA to D-PHY bridge ICs allowing for example connecting MIPI (CSI-2) powered camera controller to MIPI (DSI) powered display controller through any FPGA only supporting LVDS or CMOS I/O, but not MIPI D-PHY:


S2C’s MIPI D-PHY Prototyping Kit includes one S2C MIPI D-PHY Interface Module, one OV2710 Camera Module, and one 70WW2A WVGA Display. The MIPI Module supports the fully defined MIPI Rx Interface and MIPI Tx Interface through an MMCX connector. MIPI D-PHY Interface Module occupies one Logic Module connector and can be used on S2Cs Prodigy Virtex-7 Series Logic Modules.

The MIPI D-PHY Interface Module features:

  • 5 Pairs MMCX for MIPI Rx
  • 5 Pairs MMCX for MIPI Tx
  • MC20901 conversion of SLVS input to LVDS output up to 1.4Gbps
  • MC20902 conversion of LVDS input to SLVS output up to 1.4Gbps
  • Support Bus Turnaround option on Channel E
  • On board level shifter circuitry to support 1.2V~1.8V I/O
  • On board I2C Interface to Camera and Display
  • Occupies one LM connector


As you can see on the above graphic extracted from the “MIPI Ecosystem 2015” survey from IPnest and simplified to only show the most used interfaces in mobile phone and tablet, for multimedia (Camera, Display, Soundwire, SLIMBus), storage (UFS, UniPro and M-PHY) and RF (RFFE, DigRF and M-PHY) the winners are…
… Camera (CSI-2, CSI-3) and Display (DSI and DSI-2).


If you want to figure out which of the camera and display specification release are the most used, just look at the difference between D-PHY and M-PHY adoption rate, keeping in mind that M-PHY should also be used with UFS and DigRF on top of CSI-3 and DSI-2. Clearly D-PHY is the most used of the MIPI PHY specification and by consequence the winners are DSI and CSI-2.


Accelerating TTM is crucial in such a fast-moving market like mobile. The chip maker will use an already proven solution (Northwest Logic has used the S2C’s MIPI D-PHY Prototyping Kit to validate their own IP design) and will be able to jump-start his own FPGA Prototyping Platforms by using S2C’s prototyping kit.


You better understand why when Northwest Logic and S2C have developed a demo to showcase the effectiveness of the integrated solutions (above), this demo was based on CSI-2 and DSI. Simply the most used MIPI specifications! The video captures video data through a camera using a CSI-2 interface, stores the data into DDR3 memory, and then transfers the data via a DSI channel and display. The demo utilizes Northwest Logic’s MIPI CSI-2 camera controller, DSI display controller and DDR3 controller IP cores. The demo features support for multi-lane MIPI CSI-2 and DSI operations and pause capability.

This demo will be featured at this year’s Design Automation Conference, June 8-10, in the S2C booth #3108.

Link for S2C’s MIPI D-PHY Prototyping Kit

Availability

S2C’s MIPI D-PHY Prototyping Kit is available now.

From Eric Esteve from IPNEST

試作検証プランを入手

どのタイプのチップを設計していますか?
設計に含まれるASICゲートの容量は?
500万~2000万
2,000万~5,000万
5000万~1億
1億~10億
10億以上
どのFPGAを使いたいですか?
ザイリンクス VU440
ザイリンクス KU115
ザイリンクス VU19P
ザイリンクス VU13P
ザイリンクス VU9P
インテル S10-10M
インテル S10-2800
わからない、専門家のアドバイスが必要
どのようなFPGA構成が必要ですか?
シングルFPGA
デュアルFPGA
4 つの FPGA
8つのFPGA
わからない、専門家のアドバイスが必要
どのような周辺機器インターフェースが必要ですか?
プロトタイプ検証プラットフォームはいくつ必要ですか?
以下のツールが必要ですか?
セグメンテーションツール
複数の FPGA デバッグ ツール
コモデリング ツール (FPGA と PC ホスト間で大量のデータをやり取りできます)
当社の製品をいつ使用する必要がありますか?
0~6ヶ月
6-12ヶ月
12ヶ月以上
わからない
その他
参加する
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