Breaking the Limits of SoC Prototyping | SemiWiki.com
Nov 17, 2015

Breaking the Limits of SoC Prototyping

Pawan Fangaria  Published on 11-17-2015 11:00 AM

Earlier this month during my conversation with Dr. Walden C. Rhines, he emphasised the need for our next generation designers to think at system level and design everything keeping the system’s view in mind. The verification will go through major transformation at the system level. I can see the FPGA prototyping systems already in place for large SoCs. The designers sitting at multiple sites can access a FPGA prototyping system remotely and prototype IP, subsystem or SoC utilizing one or more FPGAs without any issue. 

It takes a lot more work than just increasing the capacity of FPGA for large SoCs; both combinational logic and sequential blocks need innovative methods to accommodate different types of logic structures, clock structures, modes of operations, test structures, I/O optimization, flexible interconnects, and so on while maintaining high performance. The configurability and flexibility of hardware extension determines the scalability of a FPGA system, but even more important is the software support to provide ease of design, verification, debug, and rework. The potential of a technology can only be realized after making it easy to design and operate.

Recently, S2C had announced its single module UltraScale VU440 Prodigy Logic Module for FPGA-based prototyping. Today, it was a pleasure to see another press release from S2C extending its Xilinx Virtex® UltraScale FPGA prototyping board family with Dual VU440 ProdigyTM Logic Module. Now a larger design can be partitioned and fitted onto two VU 440 FPGAs without any need of cabling, thus improving the SoC reliability and performance.

Article: What's new with HSPICE at DAC?-dual_vu-jpg


S2C has a clear lead in terms of scalability and ease of prototyping large SoCs on FPGAs. The Dual VU440 LM is very compact (280mm x 250mm) on a single board and can handle up to 88 million gates. It can be used as a standalone board or inside the Cloud Cube offered by S2C. The Cloud Cube is an enterprise class prototyping system that can accommodate up to 16 such logic modules, thus scaling the SoC design to more than billion gates.

Article: What's new with HSPICE at DAC?-dual_vu_architecture-jpg


The two FPGAs are connected through 518 direct interconnects and 12 GTH transceivers. There are 1200 general purpose I/Os and 64 GTH transceivers on 12 high-speed connectors that are compatible with S2C’s Prodigy Daughter Cards. The system has 177.2Mb internal memory and DDR4 SO-DIMM and DDR3 SO-DIMM sockets that can support up to 16GB of high-speed memory. The clock management scheme can be set for standalone as well as cloud-cube mode. The Prodigy connector I/O voltages can be adjusted through runtime software in GUI with 4 status LEDs on-board to indicate I/O voltage. The system supports 30000+ design interconnections between two FPGAs with LVDS running at 1.2GHz.

The system is supported by state-of-the-art Prodigy Player ProTM Runtime software that can import the design, partition it and run P&R software. The runtime software sets up clock, reset, I/O voltages, self-test, and hardware monitoring. The monitoring of hardware including cable setups between connectors and daughter cards can be done from remote location. S2C also provides other software for design implementation, Multi-Debug system for multi-FPGA deep-trace debug, and ProtoBridge AXI software for interconnect.

The Prodigy ProtoBridgeTM AXI software links the system-level simulation environment to the FPGA-based prototyping platform, thus allowing managed traffic flow. The abstraction of interconnect also renders the IP blocks reusable.

The Dual VU440 LM is S2C’s 6th generation SoC prototyping system that is quite sophisticated compared to previous generation FPGA systems and allows easy IP based prototyping for large SoCs. Multiple FPGA configuration options are possible through Ethernet port, USB port, JTAG, and micro SD card. Also there is on-board battery charging circuit that makes FPGA bin file encryption easy. 

Read the press release HERE. The datasheet for Dual VU440 ProdigyTM Logic Module is HERE

Also read:
S2C ships UltraScale empowering SoFPGA
Taking a Leap Forward to Prototype Billion Gate Designs

試作検証プランを入手

どのタイプのチップを設計していますか?
設計に含まれるASICゲートの容量は?
500万~2000万
2,000万~5,000万
5000万~1億
1億~10億
10億以上
どのFPGAを使いたいですか?
ザイリンクス VU440
ザイリンクス KU115
ザイリンクス VU19P
ザイリンクス VU13P
ザイリンクス VU9P
インテル S10-10M
インテル S10-2800
わからない、専門家のアドバイスが必要
どのようなFPGA構成が必要ですか?
シングルFPGA
デュアルFPGA
4 つの FPGA
8つのFPGA
わからない、専門家のアドバイスが必要
どのような周辺機器インターフェースが必要ですか?
プロトタイプ検証プラットフォームはいくつ必要ですか?
以下のツールが必要ですか?
セグメンテーションツール
複数の FPGA デバッグ ツール
コモデリング ツール (FPGA と PC ホスト間で大量のデータをやり取りできます)
当社の製品をいつ使用する必要がありますか?
0~6ヶ月
6-12ヶ月
12ヶ月以上
わからない
その他
参加する
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