Wave Semiconductor is developing a programmable data flow computing accelerator with IP forming massively parallel reconfigurable processor arrays and a fabric interconnect. As part of their strategy, Wave is pushing AXI for IP interconnect in FPGAs to aid in integration.  The use of AXI-connected IP in FPGAs is great for reducing partitioning differences between FPGA-based prototypes and the final ASIC.   By using the AXI interconnect, the FPGA-based prototyping platform can dynamically load, unload, and debug software through AXI on the FPGAs using a host PC. Production C code can then be used to verify the FPGA-based prototype.  Wave used S2C’s Prodigy ProtoBridge with a driver that connects to a Xilinx PCIe IP block in the Prodigy Logic Module giving the PC user-level access to the AXI master, simplifying read/write to the entire FPGA using C/C++ calls.  A SystemVerilog (SV) Direct Programming Interface based AXI Master Transactor spans between the SV testbench and C code.  By preserving the ability to run the SV testbench and use more conventional simulation tools, yet run production C code, Wave has combined the best of both worlds on S2C’s Prodigy Prototyping Platform.


Chris Nicol, CTO of Wave Semiconductor, is quoted as saying “The S2C solution included all of the modules needed to interface a host computer to a prototype of our SoC IP.  The API was straightforward to use and enabled rapid prototyping of our host software.  We were able to prove our processor fabric technology with a minimal outlay of time and resources. As such, it is an ideal fit for what we needed, and allowed us to transition with confidence from the product concept to the development stage.”


You can download the complete case study: AXI HW/SW Verification for ASIC at http://www.s2cinc.com/customers/case-studies.