S2C's FPGA-Based SoC Prototyping System Supports PCIe 3.0 Cores | EE Times
Aug 18, 2014

S2C's FPGA-Based SoC Prototyping System Supports PCIe 3.0 Cores

Max Maxfield 8/18/2014 05:55 PM EDT

When it comes to developing new ASIC, ASSP, and SoC designs, FPGA-based prototyping systems offer a number of advantages over other prototyping solutions. These advantages include extremely high "hardware-level" speed at relatively low cost.

S2C offers a variety of FPGAS-based prototyping platforms, including the V7 TAI Logic Module, which boasts four Xilinx Vitex-7 2000T FPGAs that can accommodate the equivalent of 80 million ASIC gates.

The V7 TAI Logic Module has four onboard DDR3 SO-DIMM sockets that can support up to 32 GB of DDR3 memory. The QuadE version offers 48 channels of high-speed gigabit transceivers that can run up to 10 Gbit/s and support designs using high-speed interfaces such as PCIe, SATA, and XAUI.

S2C has announced that Northwest Logic's PCI Express (PCIe) 3.0 solution -- including the Expresso 3.0 Core (PCI Express 3.0 Controller Core) and family of DMA Cores -- has been validated and certified for use with S2C's ASIC prototyping platforms. This validation and certification was performed with eight lanes running at 8 Gbit/s SerDes rates.

With some FPGA-based hardware prototypes, third-party interface subsystems like PCIe are delivered only as RTL, which has to be synthesized along with the rest of the design and ends up consuming a large proportion of the prototyping platform's FPGA resources. To get around this problem, S2C has developed a Prototype Ready suite of IP cores.

In the case of Prototype Ready IP cores, in addition to the RTL that will form part of the final ASIC/SoC design, an accessory module containing a hardware implementation of the core can be plugged on top of the TAI Logic Module as a daughter card. (Multiple accessory modules can be plugged into a TAI Logic Module.) This is the way Northwest Logic's PCIe 3.0 solution is presented -- as a Prototype Ready IP core module for use with the TAI Logic Module.

Please visit the S2C or Northwest Logic websites for more information.

— Max Maxfield, Editor of All Things Fun & Interesting Circle me on Google+

試作検証プランを入手

どのタイプのチップを設計していますか?
設計に含まれるASICゲートの容量は?
500万~2000万
2,000万~5,000万
5000万~1億
1億~10億
10億以上
どのFPGAを使いたいですか?
ザイリンクス VU440
ザイリンクス KU115
ザイリンクス VU19P
ザイリンクス VU13P
ザイリンクス VU9P
インテル S10-10M
インテル S10-2800
わからない、専門家のアドバイスが必要
どのようなFPGA構成が必要ですか?
シングルFPGA
デュアルFPGA
4 つの FPGA
8つのFPGA
わからない、専門家のアドバイスが必要
どのような周辺機器インターフェースが必要ですか?
プロトタイプ検証プラットフォームはいくつ必要ですか?
以下のツールが必要ですか?
セグメンテーションツール
複数の FPGA デバッグ ツール
コモデリング ツール (FPGA と PC ホスト間で大量のデータをやり取りできます)
当社の製品をいつ使用する必要がありますか?
0~6ヶ月
6-12ヶ月
12ヶ月以上
わからない
その他
参加する
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