Transactors -- Expanding the Role of FPGA-Based Prototypes | EE Times
Mar 01, 2015

Transactors -- Expanding the Role of FPGA-Based Prototypes

Ron Green, S2C  2/27/2015 05:30 PM EST

FPGA-based prototypes offer unbeatable flexibility, capacity, and speed. Extending their functionality through the use of a transactor interface opens up tremendous possibilities to designers.

Continuing the discussions we began by considering the Five Challenges to FPGA-Based Prototyping, we'll now take a look at some recent functionality this is now available with the most sophisticated prototyping platforms.

Power to spare It wasn't all that long ago that FPGA-based prototypes were the sole province of hardware designers and lab technicians. Viewed as finicky boards covered with rows of devices and bristling with cables, they were relegated to back rooms where engineers would endlessly tinker with them in a desperate effort to bring up designs of limited size and complexity.

No more. Today's FPGA prototypes represent muscular platforms for developing ultra-large systems running at blistering speeds. With this kind of power, these systems are used for a wide range of tasks, including design integration, system verification, and software development (see also Big Design -- Small Budget?).

This solution is well-suited to designs fully rendered in RTL that can be mapped to an FPGA. But what about cases where portions of the design are still only available as behavioral models in descriptions such as C++ or SystemC?

FPGA-based prototypes to the rescue... again The latest systems now provide transaction-level interfaces -- often referred to as "transactors" -- that bridge the abstraction level between behavioral models and live hardware. Transactors offer a way to communicate between software running on a host machine and an FPGA-based prototyping platform that often includes memories, processors, and high-speed interfaces.

One example of this is the ProtoBridge system from S2C, which supplies a transactor interface between a software program and the world of AXI-compliant hardware. There are two key parts to this: an AXI-to-PCIe bridge that connects to a host computer, and a C-API that communicates to the design through the bridge. The software-to-AXI transactor offers new flexibility to designers building ARM-based systems. Also, coupling this to a PCIe interface supporting transfer speeds up to 500 megabytes/second provides a perfect development platform for data-intensive applications.

A Cornucopia of Applications A system like this allows designers to maximize the benefits of FPGA-based prototypes much earlier in the design project for algorithm validation, IP design, simulation acceleration, and corner case testing. A prototype combined with a transactor interface makes a range of interesting applications possible throughout the design flow:

  • Algorithm/architecture exploration: When a new system is developed, behavioral models are created to explore different algorithms and architectures. But new systems are typically built upon the foundation of existing IP, often available in RTL. A transactor interface allows behavioral models to be co-simulated with RTL models, thereby exercising the full system regardless of the abstraction level or language used to define the different blocks.   
  • Early software development: The ability to run software at the earliest stage possible is becoming more important. It may be hard to access all the high-level models needed to implement a virtual platform capable of running software. Utilizing an FPGA with a transaction-level link to an ESL (electronic system level) design environment offers an effective solution. Tying together the programmer's development environment with the target platform from the hardware team allows the software to be developed earlier in the design cycle, and provides a way for each group to validate their changes against the work of the other team.

  • Block-level prototyping: Mapping an entire design to an FPGA prototype can be challenging, especially when a large number of devices is needed. The use of transactors allows mapping designs block-by-block and verifying each block against its RTL-based simulation. This can be a very effective methodology, especially when separate teams are developing IP blocks independently. This approach can prevent issues from surfacing during integration.   
  • Simulation acceleration: RTL-level simulation alone can be prohibitively slow for verifying large designs. Mapping designs from a simulation environment to an FPGA prototype provides a high-performance, cycle-accurate test environment. Systems like this can run in the hundreds of KHz, typically out-pacing RTL-level simulation by three orders of magnitude.   
  • Design debugging: Debugging a complex design in an FPGA can be difficult, especially if access to a large amount of data in memory is needed. A transaction-level interface makes it both easy and fast to transfer large amounts of data in and out of memory. This can be used to read design conditions stored in memories and registers, or to write conditions back to memory, quickly getting to the design state required for debugging.   
  • Corner case testing: In-circuit testing is probably the most important reason for doing prototyping today. But in-circuit tests are usually based on un-constraint random tests, which don't always ensure complete test coverage, and which may not reflect real operating conditions at all. Using a transactor interface allows test cases developed in simulation to be run directly on the prototype, making these tests instantly available and insuring compliance. Moreover, these tests can be easily extended to large data sets, providing coverage for corner cases and hard-to-find bugs.

The great facilitator The addition of a transactor interface to an FPGA-based prototype facilitates development of new systems in interesting ways. As behavioral models are introduced, architectures become refined and block functionality determined. These blocks are eventually defined and implemented as part of the new system. But blocks that are defined and rendered in RTL become IP for the next generation of systems, allowing the cycle of development to repeat. In this way, the FPGA prototyping platform becomes a great facilitator -- the engine of system advancement.

This combination is too powerful to ignore. FPGA-based prototypes offer unbeatable flexibility, capacity, and speed. Extending their functionality through the use of a transactor interface opens up tremendous possibilities to designers. These are tools and techniques no team should be without.

-- Ron Green is the technical communications manager with S2C Inc. His experience includes design and verification, IC layout, analog tools, cell characterization, emulation, and FPGA-based prototyping. A Silicon Valley veteran, Ron has held positions in engineering, applications, program management, and technical marketing. He appreciates clever designs, compelling materials, and the espressos at Mr. Toots Coffeehouse.


ザイリンクス VU440
ザイリンクス KU115
ザイリンクス VU19P
ザイリンクス VU13P
ザイリンクス VU9P
インテル S10-10M
インテル S10-2800
4 つの FPGA
複数の FPGA デバッグ ツール
コモデリング ツール (FPGA と PC ホスト間で大量のデータをやり取りできます)

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